1. Field of the Invention
The present invention relates to a method for manufacturing a thin film transistor (TFT) array substrate and, more particularly, to a method for manufacturing a TFT array substrate that has reduced photolithography steps.
2. Description of Related Art
The thin film transistor liquid crystal display (TFT-LCD) is mainly composed of a TFT array substrate, a color filter (CF) array substrate, and a liquid crystal layer interposed therebetween. On the TFT array substrate, a plurality of TFTs arranged in an array and a plurality of pixel electrodes, each corresponding to one of the TFTs, form a plurality of pixel structures. Moreover, each of the TFTs is composed of a gate, a channel, a drain electrode and a source electrode, and acts as a switch element of a liquid crystal displaying pixel unit.
In general, a TFT array substrate is manufactured by using five photolithography steps. The first photolithography step defines the first metal layer and thereby forms the scan line and the gate of the thin film transistor. The second photolithography step defines the channel and the ohmic contact layer of the thin film transistor. The third photolithography step is used to define the second metal layer and thereby to form the data line and the source/drain electrodes of the thin film transistor. The fourth photolithography step patterns the passivation layer. As for the fifth photolithography step, it patterns the transparent conductive layer and thereby forms the pixel electrode.
However, as the development of the TFT-LCD device is directed towards a bigger and bigger active area, the manufacturing method of the TFT array substrate currently used will encounter lots of problems in the future. For example, it may suffer a low yield and a low production rate. Therefore, if the photolithography steps used in the manufacturing of TFTs can be lowered, i.e. the frequency of exposure process when manufacturing the TFTs is reduced, the production time can be reduced, the production rate can be increased, and thereby the manufacturing cost can be lowered.
U.S. Pat. No. 6,255,130 disclosed a method for manufacturing a TFT array substrate using four photolithography steps. With reference to FIGS. 1 to 4, there are shown schematic views of the manufacturing process of a TFT. First, a glass substrate 10 is provided, and a gate electrode 12 made of copper or aluminum is formed on the glass substrate 10, as shown in FIG. 1. Next, a gate insulating layer 14, an amorphous silicon layer 16 and a metal layer 18 are formed sequentially on the gate electrode 12. Thereafter, a halftone photolithography process or a photoresist reflow process is carried out to form a photoresist layer 20 having a slit 22 on the glass substrate 10. The halftone photolithography process uses a mask having a substantially transparent area, a partially transparent area and a substantially opaque area. The substantially opaque area is corresponding to an area, on which a thicker photoresist will be formed, and the partially transparent area is corresponding to another area, on which the slit 22 or a thinner photoresist will be formed.
With reference to FIG. 2, a first etching process is subsequently carried out to remove the metal layer 18 and the amorphous silicon layer 16 which are not covered by the photoresist layer 20. Then, the photoresist layer 20 in the slit 22 is wholly removed, and the remaining photoresist layer 20 is thinned simultaneously. Afterward, with reference to FIG. 3, a second etching process is carried out to remove the metal layer 18 that is not covered by the remaining photoresist layer 20, then a source 24 and a drain 26 of a TFT are therefore formed.
Finally, a passivation layer 28 made of silicon oxide or silicon nitride is formed over the glass substrate 10 after the photoresist layer 20 is removed, as shown in FIG. 4. Accordingly, the TFT is completed.
The prior art forms a ladder shape photoresist layer having more than two thicknesses by applying the halftone photolithography process or the photoresist reflow process. If the halftone photolithography process or the photoresist reflow process can be applied to form other structures of the thin film transistor, the photolithography steps will be further reduced. Also, the yield and production rate can thus be increased.
Therefore, the present invention provides a method for manufacturing a TFT array substrate using three photolithography steps only to mitigate the aforementioned problems.